Synective Labs and Chalmers University of Technology are collaborating on a project course in FPGAs and VHDL implementation. The course, DAT096, is a one-semester project for Master students where the students will implement a Deep Learning network accelerator into a Xilinx FPGA. The Implementation includes advanced DSP algorithms, DDR memory controllers, image buffering and off-chip communication.
This is another step in Synective Labs effort to bring young engineers into the field of RTL programming and FPGAs. In recent years, there has been a massive demand for professional FPGA engineers and Synective Labs is helping to close the gap between the academic world and the industry demand. By cooperating with Chalmers, we bring real-world tasks to the students as part of their education.
Synective Labs will provide the course assignment in terms of algorithm, data sets and systems architecture, while Chalmers staff will be responsible for supervision and examination.
Synective Labs is also offering an FPGA Trainee program for newly graduated engineers to further develop their skills and become experts in the field of FPGAs and RTL coding.
