Join us in Stockholm on the 13th of September at FPGA World
FPGA developers usually try to utilize vendors’ IPs as much as possible, although these IPs are usually tested thoroughly by the vendor, developers need to incorporate them in their simulation to make sure that their design behave/communicate correctly with these IPs. In this article I made the effort to automate these tasks using some python scripts.
Synective Labs and Chalmers University of Technology are collaborating on a project course in FPGAs and VHDL implementation
Synective remains dedicated to bringing the best and most skilled consultants in RTL programming and FPGA development to the industry. As the market demands rise and the gap between the skills obtained in the educational systems and the skills required by the industry...
Synective will present our Master Thesis proposals within Embedded Deep Learning at this years Digital Degree Fair @KTH. The Degree Fair takes place on 14 october. Click on the text for more information at the exhibitors page.
Jacob, our master thesis student from KTH, is now in full swing with his project that involves getting an oldschool BRIO Labyrinth game (equipped with two stepper motors) to learn to play by itself. To achieve this, he uses image processing, Kalman filtering and a...
Synective has developed a demo system to showcase the power of embedded FPGA Deep Learning. It was able to classify hand-written digits using nothing but a tiny, low-end FPGA and a camera.
Synective has designed a CNN that is optimized with respect to memory footprint and inference speed. The network is implemented and runs on the ARM processor of the Raspberry Pi.
Synective continually take on thesis workers that improve our embedded Deep Learning system.
The Embedded Conference Scandinavia (ECS) will take place the 6:th and 7:th of November at Kistamässan. Synective Labs will, as always, attend. Be there, or be an equilateral rectangle!