CAN FD, both ISO and non-ISO
CAN 2.0A and 2.0B
System Bus Interfaces: AXI, Avalon, APB
Common receive interface for multiple Channels
Configurable Hardware Buffer Size
Status Updates in Data Stream
Transmit Rate Adaptation
Low-Latency DMA with Interrupt Rate Adaptation
Auto Acknowledge Mode
Single Shot Mode
Separate System Bus and Core Clocks
Support for Xilinx, Intel, Lattice and Microsemi FPGAs
The leading consulting company within FPGA and ASIC design in the Nordic region. We specialize in high performance systems, creating optimized hardware and software designs where FPGAs in many cases play a key role to achieve efficient solutions.
Synective Labs and Chalmers University of Technology are collaborating on a project course in FPGAs and VHDL implementation
Synective remains dedicated to bringing the best and most skilled consultants in RTL programming and FPGA development to the industry. As the market demands rise and the gap between the skills obtained in the educational systems and the skills required by the industry...